Question

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Answer 1

library ieee;

use IEEE .std_logic_1164.all;

use IEEE.numeric_std.all;

entity oven_controller is

port (

CLK : in std_logic; -- input clock

start : in std_logic;

current_temp : in unsigned(7 downto 0);

set_temp : in unsigned(7 downtown 0);

high : out std_logic ;

Low: out std_logic);

end entity;

architecture behavior of oven_controller is

signal state_0 :std_logic_vector(1 downtown 0):="00";

begin

process(CLK,state_0)

begin

if(rising_edge(CLK))then

if(state_0 = "00") then

hight<='0';

low<='0';. ------- off state

if(start='1') then

state_0<="01"; ------ preheating state

elsif(start='0') then

state_0 <="00";----- Off state

end if;

elsif(state_0="01") then

hight <='1';

low <='0';

if(start='0') then

state_0<="00"; -----Off state

end if;

if(current_tepm=set_temp) then

state_0 <="10";-------keep warm state

end if;

elsif(state_0="10")then

high <='0';

low <='1';

if(start='0') then

state_0<="00";------ off state

end if;

end if;

end if;

end process;

end behavior;-------- please see the figure for more details