Plz answers them perfectly as soon as u can
We intend to do the address decoding...
We intend to do the address decoding of a system whose microcontroller has 20 address lines (A_0 to A_19) and 8 data lines (D_0 to D_7), that it should access ROM and RAM memories, and interface to an LCD Given the information below: ROM 1 2732. initial address Ok RAM 2 6164. immediately after the ROM LCD uses 4 positions, starting at 60K draw its map memory make its address table relating the address lines to the activation signals the boolean equations for each activation line make a sketch of how the circuit would look like using GATES (no decoder), showing the CPU. peripherals and their address and data buses, and the RD/WR control line from the CPU Note that: the activation lines of the RAM and ROM are active low. for the LCD it is active high the higher address lines that are not mentioned can be presumed as low level all the time. Given the interface circuit between the address lines of a CPU to its peripherals, give the activation signals of each peripheral, indicating if they are active low or high. truth table relating the address lines and the activation signals. draw the memory map indicating the size of the block reserved for each peripheral, indicating the initial and final addresses, both in decimal and hexadecimal. NOTE: The CPU has of 16 address lines and 8 data lines, the memories are 8 bit-wide - careful with the names of the address lines: the MS lines can be assumed low. Explain In your own words the difference between RISC and CISC processors. Explain In your own words how a cache works, and give examples. Explain in your own words what is microprogramming. Give examples of recent processors that have pipeline in their architectures. What are typical improvements seen in processors focused on DSP applications? Give examples of recent processors of at least three different manufacturers.