a)
A | B | C | D | Z |
---|---|---|---|---|
0 | 0 | 0 | 0 | 0 |
0 | 0 | 0 | 1 | 0 |
0 | 0 | 1 | 0 | 0 |
0 | 0 | 1 | 1 | 0 |
0 | 1 | 0 | 0 | 0 |
0 | 1 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 |
0 | 1 | 1 | 1 | 0 |
1 | 0 | 0 | 0 | 0 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
1 | 0 | 1 | 1 | 0 |
1 | 1 | 0 | 0 | 0 |
1 | 1 | 0 | 1 | 0 |
1 | 1 | 1 | 0 | 1 |
1 | 1 | 1 | 1 | 0 |
b)
PROBLEM 4 (40%) a) Draw a truth table for Z= (A+B) (CD') b) Build an AND-OR...
Fill the truth table .
4-4) Fill in the truth table below, build your circuit and test it for those six cases. Adder-Subtractor Truth Table Input Expected Output Circuit Output A4, A3, A2, A1 Sign of B B4, B3, B2, B1 | 04 | 54 | 53 | 52 | si Same as expected? Note any discrepancies. 1001 0101 1001 0101 1001 1001 1001 1001 1001 1 + 1111 1001 1111
7) Construct the truth table for the function F(X,Y,Z) = Y’Z+ X Z’ 8) Draw the logic circuit for the function F(X,Y,Z) = Y’Z+ X Z’
4. Draw a system diagram and generate a truth table for the function. F(X, Y, Z) - XY Y.Z+Z'Y
9. (Expression Truth Table) Determine the truth table for the three-input XOR function y = 11 12 13. You may first evaluate i n and then evaluate y as y=( 12) 13. In the truth table, besides the columns for 11.12.13 and y, also include a column corresponding to I 1. Also use a word statement to describe this logic function and indicate a possible application of the function 10. (Expression Circuit) Draw a circuit schematic which realizes the logic...
6. (a) What is the truth table for this network of gates? 0011 (b) If the inputs A and B are fed the 4-bit sequences shown, in left-to-right order, what is the string of output bits at Z? (c) Build this circuit in Circuits123 and use the simulation to verify your answers to (a) 0101 and (b).
Build the truth table for half-adder and show one implementation using gates. Build a NOT gate from NOR gate. Build a NOT gate from NAND gate. Algebraic equation for XOR gate is A B bar + A bar B. Show that the algebraic equation for XNOR gate AB + A bar B bar. Draw a circuit for a 2-to-4 line decoder. 2-to-1 line multiplexer equation is given by Y = S bar I_0 + SI_1 Show an implementation of this...
Given the function F(x,y,z) = xyztx,y2+xyz (a) List the truth table for F (b) Draw the logic diagram using the original Boolean expression (c) Simplify the expression (using any method you know) (d) Draw the logic diagram for the simplified expression.
Mtimimine the expression described in the truth table of Fig. 4, and draw the circuit. Fig. 4
Given the following truth table, where X, Y, and Z are input and
W is output, write the canonical expression and generate gate-level
logical circuit (draw the wire diagram).
Given the following truth table, where X, Y, and Z are input and W is output, write the canonical expression and generate gate-level logical circuit (draw the wire diagram). 0 01 0 0 100O 0 110 (0
(2) (5 pomis) TL A-011000103, B = 011011012. Clearly 3. Conversion between truth table, circuit diagram and Boolean function. (1) (6 points) For the circuit below, write the Boolean expression F(A, B, C). Then write down the truth table for F. (2) (4 points) Draw a circuit schematic diagram which implements the following Boolean function. (Don't simplify the expression.) F(X2, X1, Xo) = x;'(x2+xo)' + xo'X1X2 (3) (10 points) The output of a logic function F(A,B,C) is one only if...