How many clock cycles does the following code take
li $t2, -32
lw $t1, 0($t5)
div $t1, $t1, $t2
sw $t1, 0($t5)
li $t2, -32
This instruction obtains one clock cycle
lw $t1, 0($t5)
This too obtains one clock cycle
div $t1, $t1, $t2
Gets 3 clock cycles; 2-cycles are necessary for fetch and decode and in 3rd cycle value intended is put in register
sw $t1, 0($t5)
Obtains two clock cycles
Therefore the code obtains only 7 clock cycles in entirety.
How many clock cycles does the following code take li $t2, -32 lw $t1, 0($t5) div ...
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