al, a2, a3, al,59,5b, 5d, 50, a2, a7,55, 58, 5a, a8, 56, 54, 52, a0, ad,...
al, a2, a3, al,59,5b, 5d, 50, a2, a7,55, 58, 5a, a8, 56, 54, 52, a0, ad, 5b, 59, a7, a5, a3, a1 Apply the above series of RAM address accesses to determine the hit ratio, access table and final state of an 8-blocks, 1 word/block, 2-way set associative cache 1. Access Table addr 4 7 0 10 12 13 14 15 16 18 19 20 21 2 24 25