Question

3. a. Calculate the delay generated by the subroutine given in table 2. Assume the system clock period as 0.35us. (10 Marks) Table 2 Label Instruction T-states LXID, 7200 10 NOP NOP DELAY DCXD 16 NOP 14 MOV AD 14 ORAC UNZ DELAY 107 b. What will be value of maximum and minimum delay possible to generate from the subroutine given in table 2? (6 Marks) c. Write a program for 8255 PPI to generate the rectangular waveform as shown in figure 4. Assume that the delay subroutine of 3ms is available for the access and can be called as per the need. (5 Marks) 3ms 6ms Figure 4 d. If a 4KB RAM interfaced with microprocessor has the final address of 5D7Eh, find the starting address.

Answer 1

The Given table is:

(a)

The 7200H hexadecimal number converts into the decimal number:

= 7 x 163 + 2 x 162 = 29184

Calculate the Delay is:

10+ 4+4+6+4+4+4 + 10) x 29184 – 3(False condtion of JNZ)

= 18 + 28 x 29184 – 3 = 817167

The clock period is 0.35 μs then the delay is

= 0.35 x 817167 = 286008 με : 286008 μs = 0.29s

(b)

The maximum delay generates if the content in register pair DE is FFFFH then the maximum delay is:

The FFFFH hexadecimal number converts into the decimal number:

= F x 163 + F X 162 +F X 16+ F = 65535

Calculate the Delay is:

= 10 +4+4+ (6+4+4+4+10) × 65535-3

= 18 + 28 x 65535 - 3 = 1834995

The clock period is 0.35 μs then the delay is

= 0.35 X 1834995 642248 μs = 0.64s

The minimum delay generates if the content in register pair DE is 0001 then the maximum delay is:

Calculate the Delay is:

= 10 + 4 + 4 + (6 + 4+4+4 + 10) X1-3

= 18 + 28 x 1-3 = 43

The clock period is 0.35 μs then the delay is

= 0.35 x 43 = 15.05 us

(d) The Size of memory: 4 KB

The final address is: 5D7E H

The z=size of memory is 4 KB then the number of address line to access to this memory is:

= 4 x 1024

= 22 x 210 = 212

The 12 number of address line A0-A11 are required to access the memory. The starting value of the memory address is 0 for the address line A0-A11.

The remaining lines A12-A15 are the chip selection line. The selection line value is same for the Initial and final address.

Then address the mapping of memory:

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 АО Address 0 1 O 1 1 1 0 1 0 1 1 1 1 1 1 0 5 D 7 m 5D7E H(Final Address) 0 0 0 1 0 O 0 0 0 0 0 o 0 0 0 5 0 a 0 5000 H(Initial address)

The starting address of chip is 5000H.