1. i. Design and test a 3-to-8 decoder with active-low outputs using VHDL/HDL. Demonstrate your outputs...
i. Design and test a 3-to-8 decoder with active-low outputs using VHDL/HDL. Demonstrate your outputs in the BASYS board. (Note: Capture the pictures of your output and add in in your answer script) ii. Include (screenshot) VHDL codes and .xdc file modification in your answer script. iii. Develop a truth table following your outputs.