Question

The figure below shows a 16-b carry-skip adder. It is composed of 4 4-bit ripple carry adders and some extra logic to route the carry. Each 4bit ripple carry adder generates a group propagate signal. This is used to determine when the carry-in is going to be propagated all the way to the carry-out. When this is the case, addition is sped up by allowing the carry-in to skip the block and become the carry-in of the next block BIS-12 AI18 811-8 A7-4 87-4 A3-0 B3-0 16-ple der C12 C12 ple akler bit rigple ad CC co Sam15-12 Sum11-8 Sm7 Som 10 C16 (i) (10 points) Show the logic circuit inside the 4-bit ripple-carry adder block. You may use full adders and basic logic gates (AND, OR, XOR, NOT, etc.) (ii) (4 points) what is the area of the carry-skip adder in terms of the number of basic logic gates (a full adder should count as 5 basic logic gates)? (iii) (10 points) Consider the situation where all stages are propagating (for example, adding all 0s to all 1 Annotate the figure showing the times at which each labeled signal becomes available in the worst-case. You may assume that a 4-bit ripple adder as a delay of 8 and a basic logic gate of any size has a delay of 1 (iv) (6 points) Compare this adder in terms of area and delay with a simple 16-bit ripple carry adder
3. Digital circuits question.

Answer 1

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