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Assuming an RCA architecture, use a stick diagram to show and calculate the actual delay when...

Assuming an RCA architecture, use a stick diagram to show and calculate the actual delay when adding 1010 1101 0110 +0101 1000 1001. Assume the time for a full add is tFA. 
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Answer #1

Answer There is a RAW(Read After Write) hazard in line 1. We can see that s1 is being written while in line 3 it is being read. It is the same situation with s2 in lines 2 and 4.

EX hazard

if (EX/MEM.RegWrite and (EX/MEM.RegisterRd ≠ 0) and (EX/MEM.RegisterRd = ID/EX.RegisterRs))

ForwardA = 10

if (EX/MEM.RegWrite and (EX/MEM.RegisterRd ≠ 0) and (EX/MEM.RegisterRd = ID/EX.RegisterRt))

ForwardB = 10

MEM hazard

if (MEM/WB.RegWrite and (MEM/WB.RegisterRd ≠ 0) and (MEM/WB.RegisterRd = ID/EX.RegisterRs))

ForwardA = 01

if (MEM/WB.RegWrite and (MEM/WB.RegisterRd ≠ 0) and (MEM/WB.RegisterRd = ID/EX.RegisterRt))

ForwardB = 01

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