Question

Suppose the branch frequencies are as follows: Conditional branches 15% Unconditional branches 1% Taken conditional branches 60% We are examining a 9-stage pipeline where the branch target address is calculated in the 3rd stage and the branch condition is evaluated in the 5th stage. Compare the performance of the machine when 90% of the conditional branches are predicted correctly with the performance of the machine when all the conditional branches are predicted to be untaken. Only branch stalls are considered

Answer 1

Answer & pipelining ceuld also be defined vas van popecess in which multiple events which do not depend on each other be enecitlion gets execuilled Simultaneosly, thereby this podccess nol only enhances the throughout but also reduces time in which output is generated. These pipelines have been divided into multiple stages, more the number oly Stages in pipelinos betler would be its perfomence. A pipeline ºn which boaneh condition is being checked co verified in 5th stage and branch address being calculatod in god stage would peoprom slightly poor Las per the peopomance measure for conditional boanch , Since ºf the condition deo sol Salisbies, calculating bounch address would lead ito loss of cpu's time. But in case of unconditional branch it woreld ropt help system to increase its efficiency was branch address would always be calculaled advance and unde unconditional branch never needs to undergo conditonal checking procedure, as they will be che cuiled every time they are encountered and would not depend on any particular condition to galishy for their Execution.

Peoboomence of machồne when 904. ob Condilionaal - branches are predicted correctly would be far more Detter than machine where all conditional boanch predicted are untaken , Since in gormey Seenario torget address of boarch instruction already gets calculated in 3rd stage thereby when machine check out the condition and binds that conditio holds tave then 94 directly jumps ito pie- calculated arget address. Whereas n halter Scenario branch instruction compuled pooves up to be obte no use Since al conditional branch are predicted to be untaken , Since it poeduction goes woong there would be van instant need of calculating branch target address again by god pipeline leading to loss of cpu's time and reducing the overall thoughput.