Select an option and justify briefly FET transistors have a ....... input impedance and are controlled...
Select an option and justify briefly
FET transistors have a ....... input impedance and are
controlled by .......
a) low-voltage
b) high-voltage
c) low current
d) high current
Homework Answers
Add Answer to:
Select an option and justify briefly
FET transistors have a ....... input impedance and are
controlled...
16. Compared to bipolar junction transistors, field effect transistors are NOT normally characterized by (a) low...
16. Compared to bipolar junction transistors, field effect transistors are NOT normally characterized by (a) low input impedance. (b) low power consumption. (c) high input impedance. a reverse-biased pn junction.
please make sure you are correct 1. Select configuration for a single-transistor amplifier with a gain...
please make sure you are correct
1. Select configuration for a single-transistor amplifier with a gain of 30 dB and input resistance of 5 Mohm. A) common-emitter; b) common-gate; c) common-source; d)common-collector; e) cannot be implemented by single stage amplifier. 2. Select configuration for a single-transistor amplifier with a gain close to 0 dB and input resistance of 5 Mohm and load resistor of 50 ohm. a) common-emitter; b) common-gate; c) common-source; d)common-collector; e) cannot be implemented by single stage...
9. A circuit that combines a zener regulator and an emitter follower is referred to as...
9. A circuit that combines a zener regulator and an emitter follower is referred to as A. An emitter regulator B. A follower regulator C. A zener follower D. A zener diode 10. Small load resistances that would overload a CE amplifier can be used with an emitter follower because an emitter follower A. steps up impedance B. amplifies high frequencies better C. has a higher voltage gain D. cannot amplify current 11. The emitter-follower amplifier has a A. low...
6. A 20 kVA. 60 Hz, 8000/277 V transformer has the following impedances referred to the high volt...
6. A 20 kVA. 60 Hz, 8000/277 V transformer has the following impedances referred to the high voltage side: Req-320, xe,-45Ω,R.-250kQ,Xm-30kQ. A) Calculate the voltage across rated load impedance with PF= 0.707 lagging when the transformer is connected to rated input voltage. B) Draw the phasor diagram showing the load voltage and current, voltage drop across the series impedance and voltage at the low voltage side of the ideal transformer, C) Calculate the efficiency of the transformer D) What adjustments...
2. How would you characterize the input impedance of an electrically small loop antenna relative to...
2. How would you characterize the input impedance of an electrically small loop antenna relative to a 50' transmission line: a. Low input resistance and capacitive reactance. b. High radiation resistance and capacitive reactance. c. Low radiation resistance and inductive reactance. d. High resistance and inductance reactance.
For the differential input stage shown below, the differential input impedance is required to be 100k....
For the differential input stage shown below, the differential input impedance is required to be 100k. Estimate the bias current in the differential amplifier to meet this specification. Hence calculate the value of R2 (in ko) required to set this bias current. The Early voltage of the NPN transistor is 150 V and that for the PNP is 50 V. Vcc (+9 V) 2N2907 Q5 2N2907 Vin (-) Q6 2N2907 2N2907 Q8 2N2222 09 2N2222 VEE (-9 V) assume lo...
For the differential amplifier shown in Figure 6: Assume well-matched transistors and = 100 for all transistors: a) Wh...
For the differential amplifier shown in Figure 6: Assume
well-matched transistors and = 100 for all transistors:
a) Why it is important to use well-matched transistors in
differential amplifier circuits? What is the potential influence of
mismatched transistors on the performance of the differential
amplifier?
b) Determine the resistor values (R1, R2 and R3) such that the
emitter coupled current IE = 0.5 mA and VC1 = 3 V.
c) Draw the ac equivalent circuit for the single ended...
Problem 3. (25 pts) The timing diagram for three state cases represents the high impedance state with a line between the low (0) and high (0) states, as ill figure: ustrated in the following 0 L...
Problem 3. (25 pts) The timing diagram for three state cases represents the high impedance state with a line between the low (0) and high (0) states, as ill figure: ustrated in the following 0 Low (0) High Impedance (Z)1 High (1) a. (15 pts) Draw the timing diagrams for the outputs A,B,C,D of the following circuit given the input diagrams in the next page. (NOTE: to help you, dashed lines are shown for the different levels) b. (10 pts)...
Problem 1: Find the input impedance for the following circuit. Assume an angular frequency of 0...
Problem 1: Find the input impedance for the following circuit. Assume an angular frequency of 0 = 50 rad/sec. 2 mF 200 mH Zin 10 mF T10mF Problem 2: Calculate average power absorbed by impedance Z = 30-7092 when a voltage V = 120 20° is applied across it. Problem 3: Assuming w=1, for the following circuit find: a. Input impedance ZH b. Thevenin voltage V c. The value of R, that will absorb the maximum average power (recall this...
3. A short circuited line of length / with characteristic impedance 2, has an input load...
3. A short circuited line of length / with characteristic impedance 2, has an input load at 2 = 0 from the generator with EMF voltage V = Vo sin(wt) and zero internal resistance. Find: A) the phasors V(2), 7(2) for steady solutions for complex voltage and current along the line; B) voltage V(z,t) and current 1(z. t) along the line; C) The impedance Z of the line as a function of w and I.
16. Compared to bipolar junction transistors, field effect transistors are NOT normally characterized by (a) low input impedance. (b) low power consumption. (c) high input impedance. a reverse-biased pn junction.
please make sure you are correct
1. Select configuration for a single-transistor amplifier with a gain of 30 dB and input resistance of 5 Mohm. A) common-emitter; b) common-gate; c) common-source; d)common-collector; e) cannot be implemented by single stage amplifier. 2. Select configuration for a single-transistor amplifier with a gain close to 0 dB and input resistance of 5 Mohm and load resistor of 50 ohm. a) common-emitter; b) common-gate; c) common-source; d)common-collector; e) cannot be implemented by single stage...
9. A circuit that combines a zener regulator and an emitter follower is referred to as A. An emitter regulator B. A follower regulator C. A zener follower D. A zener diode 10. Small load resistances that would overload a CE amplifier can be used with an emitter follower because an emitter follower A. steps up impedance B. amplifies high frequencies better C. has a higher voltage gain D. cannot amplify current 11. The emitter-follower amplifier has a A. low...
6. A 20 kVA. 60 Hz, 8000/277 V transformer has the following impedances referred to the high voltage side: Req-320, xe,-45Ω,R.-250kQ,Xm-30kQ. A) Calculate the voltage across rated load impedance with PF= 0.707 lagging when the transformer is connected to rated input voltage. B) Draw the phasor diagram showing the load voltage and current, voltage drop across the series impedance and voltage at the low voltage side of the ideal transformer, C) Calculate the efficiency of the transformer D) What adjustments...
For the differential input stage shown below, the differential input impedance is required to be 100k. Estimate the bias current in the differential amplifier to meet this specification. Hence calculate the value of R2 (in ko) required to set this bias current. The Early voltage of the NPN transistor is 150 V and that for the PNP is 50 V. Vcc (+9 V) 2N2907 Q5 2N2907 Vin (-) Q6 2N2907 2N2907 Q8 2N2222 09 2N2222 VEE (-9 V) assume lo...
For the differential amplifier shown in Figure 6: Assume
well-matched transistors and = 100 for all transistors:
a) Why it is important to use well-matched transistors in
differential amplifier circuits? What is the potential influence of
mismatched transistors on the performance of the differential
amplifier?
b) Determine the resistor values (R1, R2 and R3) such that the
emitter coupled current IE = 0.5 mA and VC1 = 3 V.
c) Draw the ac equivalent circuit for the single ended...
Problem 3. (25 pts) The timing diagram for three state cases represents the high impedance state with a line between the low (0) and high (0) states, as ill figure: ustrated in the following 0 Low (0) High Impedance (Z)1 High (1) a. (15 pts) Draw the timing diagrams for the outputs A,B,C,D of the following circuit given the input diagrams in the next page. (NOTE: to help you, dashed lines are shown for the different levels) b. (10 pts)...
Problem 1: Find the input impedance for the following circuit. Assume an angular frequency of 0 = 50 rad/sec. 2 mF 200 mH Zin 10 mF T10mF Problem 2: Calculate average power absorbed by impedance Z = 30-7092 when a voltage V = 120 20° is applied across it. Problem 3: Assuming w=1, for the following circuit find: a. Input impedance ZH b. Thevenin voltage V c. The value of R, that will absorb the maximum average power (recall this...
3. A short circuited line of length / with characteristic impedance 2, has an input load at 2 = 0 from the generator with EMF voltage V = Vo sin(wt) and zero internal resistance. Find: A) the phasors V(2), 7(2) for steady solutions for complex voltage and current along the line; B) voltage V(z,t) and current 1(z. t) along the line; C) The impedance Z of the line as a function of w and I.
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