Question

An interconnect circuit is being considered as part of a new logic architecture R1 R3 R4 R6 R7 R9 R10 C3 C4 C6 C7 C9 C10 R2 R5 R8 V(t) C1 C2 C5 C8 Initially, assume unit circuit elements. That is, the capacitors C1,..,C10 F, the resistors R.,..Rio-12m and voltage, V(t)-1 V. At t-0, the switch is closed. The voltages across the capacitors (C[i], here Cl to C10) are represented as x, Hint: V(t) may be seen as an input/control signal (sometimes called u(t)). Then, a LDS model for this circuit could be in the form [A]r+ [Bu, y-r. In which case, exp(tA)x(O) would the autonomous response and inv(w-A) . B is the transfer matrix (where inv(s1-A) įs the resolvent). (a) What is the steady-state values (i.e., the static gain matrix) of the voltages across the capacitors in this circuit. That is what are the final values of x, ,..x10? (b) Let's write this system as an LDS model. What are the [A] and [B] matrices? What are the eigenvalues and resolvent of [A]. And, importantly, what do the eigenvalues, transfer matrix, and QR [or Gram-Schmidt] decomposition indicate/signify about the system? (c) Which of the ten voltages will reach within 99% of its steady-state values last? How long will it take for it (and thus the circuit) to reach within 99% of these final values? (d) Please plot the step response of the system. That is, please plot the voltages (or states) x,..X1o as a function of time from 0 to the settling time found in (b) (e) What is the effect of doubling the voltage on the overall settling time? Based on this, would it be possible to select a voltage such that the system will deliver 1 Volt across C10 in t-0.3004 (ie.. xo(t-0.3004s)-1 Volt)

Answer 1

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