A digital signal processor (DSP) is designed to perform FFT operations for a digital oscilloscope...
A digital signal processor (DSP) is designed to perform FFT operations for a digital oscilloscope that utilizes a 12-bit A/D converter. the most cost effective ALU architecture for this CPU is a:
- Fixed-point multiplier with an 8-bit data path
- Floating-point multiplier with an 8-bit data path
- Fixed-point multiplier with a 16-bit data path
Floating-pointing multiplier with a 16-bit data path
Homework Answers
Option A is the CORRECT answer.
Floating point multiplier costs about 2 to 4 times than fixed point multiplier.
A fixed point multiplier with an 8 bit data path will cost less than a fixed point multiplier with an 16 bit data path. So, the most cost effective ALU architecture for this CPU is a fixed point multiplier with an 8 bit data path.
Hope this helps.
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