Question

Q3 Design a Moore state machine that operates from its reset state as follows: Output A is low until it receives the sequence 1101 at which time it goes high for 1 clock cycle Output B is low until it receives the sequence 1110 at which time it goes high for 1 clock cycle. The sequences may overlap. . This is to be a single state machine You are only required to provide a state transition diagram for the SM designed. (10 marks) Paste or draw state diagram here

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Answer 1

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