You are given a homework processor (HPro) capable of addressing 32 8-bit (1 byte) wide registers....
You are given a homework processor (HPro) capable of addressing 32 8-bit (1 byte) wide registers. However, it has only 29 physical registers. Register RO, R1 and R31 are not physically implemented. Instead, every read from RO, R1 and R31 will return a constant zero (00000000), constant one (00000001) and all ones (11111111), respectively. Every write to RO, R1 and R31 will go to null (dummy write). Assume that all other registers have initially unknown (X) state (This in fact is what actually happens in several real processors, which use registers without reset in order to reduce hardware cost) HPro has the following instruction set: Mnemonics NAND D, S ADD D, S ROL D, S UMP D, S Description Instruction Logical NAND Signed ADD Rotate Left Jump if Zero D D &S Note that Additions are performed in 2's complement signed form . PC means program counter (contents). . D means destination register (contents) . S means source register (contents) In all the questions below, use HPro instruction set. You may use as many temp registers as necessary 7. (15 points) Write the ASM code for the following RTL code: R2 ← R3 ^ R4 (XOR)