Question

Design a counter that starts at "0" and increases by two until you reach "6" and then starts at "0" again and continues counting in the same way. Your digital circuit design must be implemented using D-flipflops, and your answer must include: • The transition graph (be detailed and contain all proper directions and values) • The next state truth table (needs to include the present and next-state) • The K-map(s) for next-state equation • Determine the optimal SoP next state equations • The flip-flop inputs truth table • The K-map(s) for the flip-flop inputs • Determine optimal SoP equations for the flip-flop inputs • Lastly, draw the digital circuit and show where in your circuit the "count" is being outputted Upload Choose a File

Answer 1

The counter starts at 0 and increases by two untill 6 and again starts at 0.

$0\;\rightarrow 2\;\rightarrow4\rightarrow6\rightarrow0$

0 » 2» 4 » 6» Start 000 110 010 100

Let's try to form the Truth table for the above transition diagram

CLK	Present State	Next State
$Q_{A}$	ев	$Q_{C}$	$Q_{A}^+$	$Q_{B}^+$	+ CC
↑	0	0	0	0	1	0
↑	0	1	0	1	0	0
↑	1	0	0	1	1	0
↑	1	1	0	0	0	0

If we draw the K-map and find the SoP of the next equations we get them as shown in the below pictures.

QAT QB Qc QBQc QBQc QBQc QA 0 x X 1 QA 1 X X 0 la* = Q&QB + Qalb

Qв Qв Qс QвQс Qвес ABQc QA 1 Х Х о 1 QA X Х о QB+ = QB

ex QB Qc AB Qc ABQc Qвес QA 0 Х X 0 QA 0 X X 0 + Qс Qc

We are using D-FF to realise this operation

Truth Table for D-FF :

Clk	D	Q
0	X	Q
1	0	0
1	1	1

The output of the D-FF is same as the input when clock is applied. So if we make the truth table for next state and the input of FF we get the truth table as shown below

CLK	Present State	Next State
$Q_{A}^+$	$Q_{B}^+$	+ CC	$D_{A}$	$D_{B}$	$D_{C}$
↑	0	1	0	0	1	0
↑	1	0	0	1	0	0
↑	1	1	0	1	1	0
↑	0	0	0	0	0	0

the Truth table for all present state , next state and flip-flop inputs are as shown below.

Present State Next State CLK Flip-Flop inputs DA DB Dc + QA QB Qс QA QB* Qc" 0 0 0 0 1 0 0 1 0 1. 1 0 1 0 1 0 0 1 0 0 个 1 0 0 1 1 0 1 1 0 1 1 1 0 0 0 0 0 0 0

The K-map for the flip-flop inputs and present states are same as the next state. because the truth table is same for next state and flip flop inputs

DA QR Qc QB Qc QBQc AB Qc QA 0 X X 1 QA 1 x X 0 Da= Qalb + Qalb

DB Qв Qс lblc (blc QBQc QA 1 X X 0 QA 1 X X 0 DB= QB

Dc QB Qc QвQс евQс QBQc QA 0 X x 0 QA 0 x x 0 Dc = Qc

The circuit for the above equation will be

Q a Count Q ē D Q clk ē

Hope you got the right answer.. If you have any doubts regarding this please try to comment. Please forgive for mistakes, It take almost 2hrs to design the whole part for clarity.

Thank you and don't forget to upvote.