Question

Question 3 40 pts Design a counter that starts at "0" and increases by two until you reach "6" and then starts at "0" again and continues counting in the same way. Your digital circuit design must be implemented using D-flipflops, and your answer must include: . . The transition graph (be detailed and contain all shoper directions and values) The next state truth table (needs to include the present and next-state) The K-map(s) for next-state equation Determine the optimal SoP next state equations The flip-flop inputs truth table The K-map(s) for the flip-flop inputs Determine optimal SoP equations for the flip-flop inputs Lastly, draw the digital circuit and show where in your circuit the "count" is being outputted Upload Choose a File

Answer 1

Transition Graph is shown below:

Here its a even counter where Q₀ = 0 through out the count sequence. Hence LED representing Q₀ is grounded.

so S3 51 2 S2 4 MOORE TRANSITION GRAPH We use three bit state representation. P2Q, Qo= 000,010, 100,110 f back to 0oo.

State Table:

Unused states i.e. 1, 3, 5 and 7 are treated as don't cares.

PRESENT STATE	NEXT STATE
Q2	Q1	Q0	Q2+	Q1+	Q0+
0	0	0	0	1	0
0	0	1	X	X	X
0	1	0	1	0	0
0	1	1	X	X	X
1	0	0	1	1	0
1	0	1	X	X	X
1	1	0	0	0	0
1	1	1	X	X	X

K Map Simplification -

Let D2, D1, D0 represent D inputs to D Flip Flop.

We will not use D0 as flip flop due to Q0 remains LOW throughout the count sequence.

Dz DI Q? o 10 Х - (Х 0 Х IN XIX 1X D₂ = Q 2Q1 + Q₂ Qi D2 = P2OQ, Dy= Qi Do Q2 0 0.01 II XIX 10 XIX Do=0

Circuit Implementation

Q2 Q1 QO O CLOCK Q Deno Deno