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Write the propagation delay of the emitter coupled logic inverter. Write about the propagation delay of...

Write the propagation delay of the emitter coupled logic inverter.

Write about the propagation delay of the emitter coupled logic inverter.

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A high-speed bipolar logic family is Emitter coupled logic (ECL). In emitter coupled logic inverter, the transistors are prevented from entering in saturation by choosing appropriate resistor values. The input or output voltages have a very small swing of nearly 0.8V. The input impedance is always high and the output impedance is low. As a result, there is no loading effect, the ECL inverter change states ( logic high to logic low or vice versa) very quickly which means,

  • gate delays are low, and
  • fanout capability is high
  • It offers higher-frequency operation

By properly choosing the resistor values, ECL avoids the storage-time problem which leads to very low propagation delay.

Typically the gate propagation delay of ECL inverter is 2 ns.

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