. An embedded microcontroller with a 20‐bit address bus implements the following four blocks of memory. Draw an address decoding table to satisfy the following memory map and design an address decoder to select each of these devices.
a. RAM1 0 0000 ‐ 3 FFFF
b. RAM2 4 0000 ‐ 7 FFFF
c. ROM1 E 0000 ‐ E 7FFF
d. ROM2 F 0000 ‐ F FFFF
I know that the answer is:
I was wondering if someone could explain how they came to that. Like what do you do to with the numbers in the second column (0 0000 ‐ 3 FFFF for example) to get an answer?
For RAM1 the memory map address range is:
0 0000 to 3 FFFF
In binary it is
0000 0000000000000000
to
0011 1111111111111111
The bits that remains the same throughout this range is the two most significant bits(00), which are A19 and A18. These bits are 0.
Thus to select this RAM, A19'(0'=1) . A18'(0'=1) is performed, which gives logic one (1.1=1) as result. So that RAM1 will be selected when A19 and A18 are 0.
For RAM2, the address range is:
4 0000 to 7 FFFF
In binary it is:
0100 0000000000000000
to
0111 1111111111111111
The bits A19(value 0) and A18(value 1) remains same. To select this RAM A19' AND A18 are performed. A19'(0'=1).A18(1) is performed. That is 1.1 gives logic 1. Thus this RAM will be selected when A19 is 0 and A18 is 1.
For ROM1 the address range is:
E 0000 to E 7FFF
In binary it is:
1110 0000000000000000
1110 0111000000000000
The bits A19(1), A18(1), A17(1), A16(0), A15 (0) remains same throughout the range.
Thus to select this ROM A19.A18.A17.A16'.A15' logic is used.
For ROM2 the address range is:
F 0000 to F FFFF
In this only the last four most significant bits are same with value 1 throughout the range.
Thus logic A19.A18.A17.A16 is used to select the ROM 2.
. An embedded microcontroller with a 20‐bit address bus implements the following four blocks of memory....
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