Question

4.6 When silicon chips are fabricated, defects in materials (eg, silicon) and manufacturing errors can result in defective circuits. A very common defect is for one wire to affect the signal in another. This is called a cross-talk fault. A special class of cross-talk faults is when a signal is connected to a wire that has a constant logical value (eg, a power supply wire). In this case, we have a stuck-at-0 or a stuck- at-l fault, and the affected signal always has a logical value of 0 or 1, respectively The following problems refer to bit of the Write Register input on the register file in Figure 4.24. 4.6.1 [10] <594.3, 4.4>Let us assume that processor testing is done by filling the PC registers, and data and instruction memories with some values (you can choose which values), letting a single instruction execute, then reading the PC, memories, and registers. These values are then examined to determine if a particular fault is present, Can you design a test (values for PC, memories and registers) that would determine if there is a stuck-at-o fault on this signal? 4.6.2 (10) $4.3, 4.4> Repeat 4.6.1 for a stuck-at-I fault. Can you use a single test for both stuck-at- and stuck-at-I? If yes, explain how, if no, explain why not 4.6.3 (601554.3, 4.4> If we know that the processor has a stuck-at-1 fault on this signal, is the processor still usable? To be usable, we must be able to convert any program that executes on a normal MIPS processor into a program that works on this processor: You can assume that there is enough free instruction memory and data memory to let you make the program longer and store additional data. Hint: the processor is usable if every instruction "broken by this fault can be replaced with a sequence of working instructions that achieve the same effect 4.6.4 (10) <654.3, 4.4> Repeat 4.6.1, but now the fault to test for is whether the "MemRead" control signal becomes 0 if RegDst control signal is 0, no-fault otherwise 4.6.5 [10] <594.3, 4.4> Repeat 4.6.4, but now the fault to test for is whether the jump" control signal becomes 0 if RegDat control signal is 0, no-fault otherwise

Answer 1

-->To testt for a stuck--at--zeroo fault on a "Wire", we tend to need an "instruction" that puts thatt "wire" to worth a worth a price) "1" & includes a diferent 'result' if value on the 'wire' is stuck-at-O; -->Bit-7 of the 'instruction_word' is just used because the 'part' of an immediatee//offset a part of instruction, so one way to test -would be to 'execute'" ADDI $1 ", "zero", "128" that supposed to 'place' a value of '128' into " $1". If the instruction_bit-7 is stuck at zero., '$1' will be 'O' because value '128' has all 'bits' at 'O' except 'bit-7'. --> the only " instructions " that set thiss 'signal' to 'l' are loads. --> we will test by 'filling' the data_memory with O's & executing a 'load_instruction' from a 'non-zero' address, example:: lw $1, 1024(zero). -->After this 'instruction, the value in $1' is meant to be 'o'. If the "'" MemtoReg_signal "" is stuck at 'O'., the 'value' within the registr would be '1024' ---the 'Mux' selects the " ALU output (1024)" rather than value from the" memory". **-->The take a look at for "stuck-at-0" want Associate in Nursing 'instruction' that 'sets' the 'signal' to '1'

& the test for 'stuck-at-one' needs an - instruction that sets' signal to zero! Because the signal can'nt be each 'O' & '1' within the 'same_cycle', we won't test the same_signl simultaneously for "stuck-at-zero" & "stuck-at- one" using only 'one' instruction. The test for "stuck-at-one" is analogous to the "stuck-at- 0" test: --> we will use 'ADDI $1', 'zero', zero that is supposed to place a value of zero in $1. If "Bit- 7" of the instruction word is "stuck-at-one", the immediat_ operand becomes '128' and '$1' becomes '128' instead of 'zero'. --> we cannot reliably test for this fault, because all instructions that set the MemtoReg signal to zero also set the ReadMem signal to zero. If one of these instructions is employed as a test for MemtoReg stuck-at-1, the worth written to the destination register is "random” (whatever noise is there at the data output of data Memory). This value might be the same as the value already in the register, thus if the fault exists the test might not detect it.

--> It's posible to work for this 'fault', however it's very difficult.,we should find all instructions that have 'O' in this little bit of the 'offset' or immediatee 'operand' & 'replace' them with a 'sequnce' of ""safe" instruction. -->For example, a load with such an offset should get replaced with an instruction that subtracts 128 from the address_registr, then the load --with the offset 'larger' by '128' to set "bit-7" of the offset to '1.., then subtract '128' from the address_register. --> we can not 'work" around this -problema, because it preventts all the instructions from storing their's result in 'registers', except for 'load_instructions'.--> Load_instructions can only move the 'data' frm memory to 'registers', in order that they can not be used to emulate "ALU_operations" "broken” by the 'fault'.