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Problem 1 (a). To improve circuit performance (speed). you are given the option of using a device technology that increases mobility (e.g. strained silicon) or a device technology that lowers threshold voltage (e.g. channel doping). Which device technique should you go with? Why? The extra process cost for implementing the technique can be ignored. (b). Consider a short channel CMOS technology with a supply voltage of 1V, a nominal threshold voltage of 0.3V, a Vasat of 0.4V, and a sub-threshold swing of 100mv/dec. For a 10% increase in threshold voltage due to process variation, what is the % change in lon (ie., as when ,-Va,-Vad) and loff (i.e. lds when ,-0, Va-Vad).

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