Question

Please explain all steps and reasoning!

6) For the circuit shown below, plot VO and V1 as a function of time in the plot shown below. The input voltage on the left is a sawtooth wave show below. The turn on voltage of the diodes are 1 V and 0.7 V as shown below. Use the CVD model Clearly mark the voltages. VNIV OD 0.7V Tapat Villay V San 210 mF Draw your final answer for Vo and V1 in this Voltage (V) plot. The next page is scratch paper Time(s) 1 2 12 16 4 10 14 6 -6

Answer 1

The above diagram can be Re-drawn as From the above figure it is clear that V_0 = (Voltage across C_1) + (Voltage across C_2) V_0 = V_C_1 + V_C_2 V_1 = Voltage across C_2 V_2 = V_C_2 \r\n During positive half cycle of input wave form, D_1 = ON D_2 = OFF C_1 changes upto 6 - 0.7 v = 5.3 v i.e here V_C_2 = 0 V V_C_1 = 6 - 0.7 = 5.3 V here observe that V_1 = 5.3 V until D_2 turns ON in the negative half cycle of input (This will be more clear after case - 2 is completed) \r\n During Negative half cycle of input wave form, D_1 = OFF D_2 = ON C_2 Charges upto 6 - 1 = 5 V i.e here note that D_2 does not turn ON untill Input reaches -1 volts, when Input lessthanorequalto -1 V then D_2 is on C_2 starts charging. here V_1 = V_C_2 as V_C_2 increases V_0 also
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