1. Option C is correct because in Big endian representation, most significant hexadecimal digit pair is at lower address and least significant digit pair is at higher address. Hence in address 78563412h , the first digit pair 78h will be at lowest starting address and then next address will contain 56h and then 34h and finally 12h. So option C is correct.
2.
Here XCHG instruction swap the content of 2 registers. Hence 1) matches with E).
SHR instruction shift the content of register to right by specified amount and hence to divide by 2, we have to shift the content to right by 1 unit. Hence 2) matches with D).
Here 3) matches with B) because XOR will output 1 for odd number of 1s and output 0 for even number of 1s.
Here 4) matches with C) because NEG convent the number to negative by converting the number to its 2's complement.
Here 5) matched with A) because NOT instruction flips the bit value from 0 to 1 and vice-versa and hence convert the number to 1's complement.
Hence option A is correct.
3. Here option a) and b) are not correct because mov or move are not MIPS instruction and option C is correct but not option D because we need to load the word from address of A and B and finally store the addition in address of C.
PLease comment for any clarification.
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