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(25 points) Consider a 1-bit and a 2-bit predictor. In the table below, indicate the prediction...
Assume that an architecture uses 2-bit branch predictor and the predictor is initially set to SNT....
Assume that an architecture uses 2-bit branch predictor and the predictor is initially set to SNT. For the following branch outcomes, indicate if each outcome is correctly predicted or not. In the table, T and NT represent Taken and Not-Taken branch outcomes, respectively. The states for 2-bit branch are ST (Strong-Taken), WT (Weak-Taken), WNT (Weak-Not-Taken), SNT (Strong-Not-Taken). Please use C for correct prediction and I for incorrect prediction. T т т т NT NT NT T T T T NT...
Question 15 Assume that an architecture uses 2-bit branch predictor and the predictor is initially set...
Question 15 Assume that an architecture uses 2-bit branch predictor and the predictor is initially set to WNT. For the following branch outcomes, indicate if each outcome is correctly predicted or not. In the table, T and NT represent Taken and Not-Taken branch outcomes, respectively. The states for 2-bit branch are ST (Strong-Taken), WT (Weak-Taken), WNT (Weak-Not-Taken), SNT (Strong-Not-Taken). Please use C for correct prediction and I for incorrect prediction. Branch Outcome T T T T T NT NT NT...
Ch04.4. [6 points] Branch Prediction. Consider the following sequence of actual outcomes for a si...
Ch04.4. [6 points] Branch Prediction. Consider the following sequence of actual outcomes for a single static branch. T means the branch is taken. N means the branch is not taken. For this question, assume that this is the only branch in the program. TTTNTNTTTNTNTTTNTN Assume that we try to predict this sequence with a Branch History Table (BHT) using one-bit counters. The counters in the BHT are initialized to the N state. Which of the branches in this sequence would...
14(10 points) In this problem we want to examine the accuracy of branch predictors for the...
14(10 points) In this problem we want to examine the accuracy of branch predictors for the following repeating pattern (e.g, in a loop) of branch outcomes: NT, T, NT, NT, T What is the accuracy of always-taken and always-not-taken predictors for this sequence of branch outcome? a) b) Wh at is the accuracy of the 2-bit predictor for the first four branches in this pattern, assuming the predictor starts in the bottom left state ( predict not taken) in state...
1. Suppose we have a 5-stage pipeline CPU and run the following instructions: or $tl, $t2, $t3 or...
1. Suppose we have a 5-stage pipeline CPU and run the following instructions: or $tl, $t2, $t3 or $t2, $tl, $t4 or $tl, $tl, $t2 1.1. What dependencies are there in the code? 1.2. Suppose there is no forwarding. What hazard may happen? Draw the pipeline diagram and insert stall (nop) to prevent these hazard. 1.3. If the pipeline has full forwarding. Are there still hazard? If so, draw the pipeline diagram and insert stall (nop) to prevent the hazard....
1. Suppose you want to design a 2-bit binary up-counter. Construct the state table using A1...
1. Suppose you want to design a 2-bit binary up-counter. Construct the state table using A1 and AO as the previous state of bits and A1+, A0+ as the next bit states, ie, to count from 00 to 01, A1 stays at 0, but AO changes from 0 to 1. Let the counter wrap-around, such that 11 -> 00. Draw the state diagram. 2. Next, add in a third input, En, for enable. The counter can only count up when...
1) Design a synchronous 3-bit binary UP/DOWN counter uses the following counting pattern 10.2.3.7.6.40.1.3...) the counter...
1) Design a synchronous 3-bit binary UP/DOWN counter uses the following counting pattern 10.2.3.7.6.40.1.3...) the counter will count in this pattern indefinitely when the input X is equal to 1. When the input the counter will reverse direction and count in the opposite pattern 0. 4 7310) Complete the state diagram, transition table, New state s and solve for the recitation equations for flipflops that will perform this function. (You do not need to draw the flip-flops Use the state...
P6 (15 points): The FSM state diagram below has two inputs x1 and xo In addition,...
P6 (15 points): The FSM state diagram below has two inputs x1 and xo In addition, it has two DFFS, three 4-to-1 MUXes, a single XOR gate, a single AND gate, and a single output bit Z. Answer the following questions about this FSM. o/0 10/0 RESET A 61/0 C 9/0 01/0 1/0 o1/0 6/0 A: Is this a Moore FSM or a Mealy FSM? B: The state encodings are A-00, B-01, C-10, and D=11. Write a state- assigned table...
5. A circuit must detect a 01 sequence. The sequence sets z= 1,which is reset only by a 00 sequen...
5. A circuit must detect a 01 sequence. The sequence sets z= 1,which is reset only by a 00 sequence. For all other cases, z = 0. Overlap is allowed in the sense that the second bit of the reset sequence “00” can be counted as the first bit of the next set sequence “01.” For example, for input sequence x as follows, the corresponding output sequence z would be: x = 010100100 z = 011110110 For this circuit: A)...
BIT MAXIMUM VALUE SELECTOR Consider a simple device that takes two 2-bit binary inputs representing two...
BIT MAXIMUM VALUE SELECTOR Consider a simple device that takes two 2-bit binary inputs representing two values ranging from zero to three. The 2-bit value A is represented by two input variables Al and A0. Values of Al and A0 will be used to encode numeric values (in binary) as described below. 2-bit values for the second 2-bit input B and the 2-bit output C are encoded similarly. The 2-bit output C of the de- vice will be the greater...
Assume that an architecture uses 2-bit branch predictor and the predictor is initially set to SNT. For the following branch outcomes, indicate if each outcome is correctly predicted or not. In the table, T and NT represent Taken and Not-Taken branch outcomes, respectively. The states for 2-bit branch are ST (Strong-Taken), WT (Weak-Taken), WNT (Weak-Not-Taken), SNT (Strong-Not-Taken). Please use C for correct prediction and I for incorrect prediction. T т т т NT NT NT T T T T NT...
Question 15 Assume that an architecture uses 2-bit branch predictor and the predictor is initially set to WNT. For the following branch outcomes, indicate if each outcome is correctly predicted or not. In the table, T and NT represent Taken and Not-Taken branch outcomes, respectively. The states for 2-bit branch are ST (Strong-Taken), WT (Weak-Taken), WNT (Weak-Not-Taken), SNT (Strong-Not-Taken). Please use C for correct prediction and I for incorrect prediction. Branch Outcome T T T T T NT NT NT...
Ch04.4. [6 points] Branch Prediction. Consider the following sequence of actual outcomes for a single static branch. T means the branch is taken. N means the branch is not taken. For this question, assume that this is the only branch in the program. TTTNTNTTTNTNTTTNTN Assume that we try to predict this sequence with a Branch History Table (BHT) using one-bit counters. The counters in the BHT are initialized to the N state. Which of the branches in this sequence would...
14(10 points) In this problem we want to examine the accuracy of branch predictors for the following repeating pattern (e.g, in a loop) of branch outcomes: NT, T, NT, NT, T What is the accuracy of always-taken and always-not-taken predictors for this sequence of branch outcome? a) b) Wh at is the accuracy of the 2-bit predictor for the first four branches in this pattern, assuming the predictor starts in the bottom left state ( predict not taken) in state...
1. Suppose we have a 5-stage pipeline CPU and run the following instructions: or $tl, $t2, $t3 or $t2, $tl, $t4 or $tl, $tl, $t2 1.1. What dependencies are there in the code? 1.2. Suppose there is no forwarding. What hazard may happen? Draw the pipeline diagram and insert stall (nop) to prevent these hazard. 1.3. If the pipeline has full forwarding. Are there still hazard? If so, draw the pipeline diagram and insert stall (nop) to prevent the hazard....
1. Suppose you want to design a 2-bit binary up-counter. Construct the state table using A1 and AO as the previous state of bits and A1+, A0+ as the next bit states, ie, to count from 00 to 01, A1 stays at 0, but AO changes from 0 to 1. Let the counter wrap-around, such that 11 -> 00. Draw the state diagram. 2. Next, add in a third input, En, for enable. The counter can only count up when...
1) Design a synchronous 3-bit binary UP/DOWN counter uses the following counting pattern 10.2.3.7.6.40.1.3...) the counter will count in this pattern indefinitely when the input X is equal to 1. When the input the counter will reverse direction and count in the opposite pattern 0. 4 7310) Complete the state diagram, transition table, New state s and solve for the recitation equations for flipflops that will perform this function. (You do not need to draw the flip-flops Use the state...
P6 (15 points): The FSM state diagram below has two inputs x1 and xo In addition, it has two DFFS, three 4-to-1 MUXes, a single XOR gate, a single AND gate, and a single output bit Z. Answer the following questions about this FSM. o/0 10/0 RESET A 61/0 C 9/0 01/0 1/0 o1/0 6/0 A: Is this a Moore FSM or a Mealy FSM? B: The state encodings are A-00, B-01, C-10, and D=11. Write a state- assigned table...
BIT MAXIMUM VALUE SELECTOR Consider a simple device that takes two 2-bit binary inputs representing two values ranging from zero to three. The 2-bit value A is represented by two input variables Al and A0. Values of Al and A0 will be used to encode numeric values (in binary) as described below. 2-bit values for the second 2-bit input B and the 2-bit output C are encoded similarly. The 2-bit output C of the de- vice will be the greater...
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