Question
please answer
$5 UXIF map in the computer uses direct mapping Question 18 5 pts Suppose we have a byte-addressable computer using 2-way set
Question 24 5 pts Given a computer using a byte-addressable virtual memory system with a two-entry TLB, a 2-way set associati
0 0
Add a comment Improve this question Transcribed image text
Answer #1

Solution:

(18)

Given,

=>Byte-addressable computer.

=>2-way set associative cache memory.

=>16-bit main memory

=>Number of blocks in the cache = 32 blocks

=>Block size of each block = 8 bytes

Explanation:

Set associative cache:

Tag Set index Block offset

9 bits            4 bits                                        3 bits

Calculating size of block offset field:

=>Number of bits required for block offset field = log2(Block size)

=>Number of bits required for block offset field = log2(8 B)

=>Number of bits required for block offset field = 3 bits

=>Hence size of block offset filed = 3 bits

Calculating size of set field:

=>Number of sets in the cache memory = number of blocks in the cache/N-way

=>Number of sets in the cache memory = 32/2

=>Number of sets in the cache memory = 16 sets

=>Number of bits required for set index fields = log2(Number of sets)

=>Number of bits required for set index fields = log2(16)

=>Number of bits required for set index fields = 4 bits

=>Hence size of set field = 4 bits

Calculating size of tag field:

=>Number of bits required for tag field = Total bits - set field bits - offset field bits

=>Number of bits required for tag field = 16 - 4 - 3

=>Number of bits required for tag field = 9 bits

=>Hence size of tag field = 9 bits

I have explained each and every part of the first question only according to "Chegg guidelines when multiple questions are given then only first questions needs to be answered" with the help of statements attached to it.

Add a comment
Know the answer?
Add Answer to:
please answer $5 UXIF map in the computer uses direct mapping Question 18 5 pts Suppose...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
  • Problem 6. Suppose we have a computer with 32 megabytes of main memory, 256 bytes of...

    Problem 6. Suppose we have a computer with 32 megabytes of main memory, 256 bytes of cache, and a block size of 16 bytes. For each configuration below, determine the memory address format, indicating the number of bits needed for each appropriate field (i.e. tag, block, set, offset). Show any relevant calculations. Direct cache mapping and memory is byte-addressable a) Direct cache mapping and memory is word-addressable with a word size of 16 bits b) c) 2-way set associative cache...

  • pls both 31 Question 31 10 pts Suppose we have a byte-addressable computer using 4-way set...

    pls both 31 Question 31 10 pts Suppose we have a byte-addressable computer using 4-way set associative mapping with 24-bit main memory addresses and 64 blocks of cache. Suppose also that a block contains 32 bytes. The size of the block offset field is bits, the size of the set field is bits, and the size of the tag field is bits. Question 32 1 pts is the oldest and most cost-effective of all mass-storage devices. Magnetic tape Compact dick...

  • 29 pls clesr ans the average access time for the processor to access an item? 29ns...

    29 pls clesr ans the average access time for the processor to access an item? 29ns Question 29 7 pts Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing a total of 64K bytes of data, and blocks of 32 bytes. If the computer uses direct mapping, the format of the memory address is as follows: bits for the tag field, bits for the cache block number, and bits for the block offset. Question 30 7 pts...

  • Question 31 supus Given a computer using a byte-addressable virtual memory system with a two-entry TLB,...

    Question 31 supus Given a computer using a byte-addressable virtual memory system with a two-entry TLB, a 2-way set associative cache, and a page table for a process P. Assume cache blocks of size 16 bytes. Assume pages of size 32 bytes and a main memory of 4 frames. Assume the following TLB and page table for Process P: TLB 03 4 هما 0 1 2 3 4 5 6 7 Page Table f Vali d 1 1 0 2...

  • Question 28 7 pts Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing...

    Question 28 7 pts Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing a total of 64K bytes of data, and blocks of 32 bytes. If the computer uses direct mapping, the format of the memory address is as follows: bits for the tag field, bits for the cache block number, and bits for the block offset.

  • Suppose a computer using a fully associative cache has 232 bytes of byte-addressable main memory and...

    Suppose a computer using a fully associative cache has 232 bytes of byte-addressable main memory and a cache of 1024 blocks, were each cache block contains 32 bytes. Consider a memory address as seen by the cache. How many bits are in the tag field?

  • 18. You have a byte-addressable virtual memory system with a two-entry TLB, a 2-way set associati...

    18. You have a byte-addressable virtual memory system with a two-entry TLB, a 2-way set associative cache, and a page table for a process P. Assume cache blocks of 8 bytes and page size of 16 bytes. In the system below, main memory is divided into blocks, where each block is represented by a letter. Two blocks equal one frame. Given the system state as depicted above, answer the following questions: a) How many bits are in a virtual address...

  • Question 29 7 pts Suppose we have a byte-addressable computer with a cache that holds 8...

    Question 29 7 pts Suppose we have a byte-addressable computer with a cache that holds 8 blocks of 4 bytes each. Assuming that each memory address has 8 bits, to which cache block would the hexadecimal address Ox1F map if the computer uses direct mapping?

  • Suppose we have a byte-addressable computer with a cache that holds 8 blocks of 4 bytes...

    Suppose we have a byte-addressable computer with a cache that holds 8 blocks of 4 bytes each. Assuming that each memory address has 8 bits and cache is originally empty, for the cache mapping technique, two-way set associative, trace how cache is used when a program accesses the following series of addresses in order: 0x01, 0x04, 0x09, 0x05, 0x14, 0x21, and 0x01.

  • A certain byte-addressable computer system has 32-bit words, a virtual address space of 4GB, and a...

    A certain byte-addressable computer system has 32-bit words, a virtual address space of 4GB, and a physical address space of 1GB. The page size for this system is 4 KB. Assume each entry in the page table is rounded up to 4 bytes. a) Compute the size of the page table in bytes. b) Assume this virtual memory system is implemented with a 4-way set associative TLB (Translation Lookaside Buffer) with a total of 256 address translations. Compute the size...

ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
ADVERTISEMENT
ADVERTISEMENT