Question

Consider implementing a new Y86-64 iandq V, rB instruction that computes R[rB] &= V (assuming that rB is a register ID and V is an 8-byte value)：

a. (10) Describe the functionality of each Y86-64 processor stage in terms of the icode, ifun, rA, rB, valA, valB, valC, ualP, valE, valM, srcA, srcB, dstE, dstM, end signals (you may also use M, R, and PC): IF: ID: EX: MEM: WB: PC: b. (5) How many bytes are required to encode this instruction (i.e., based on Y86-64 encoding conventions)? Why?

Answer 1

Y86 Instruction Set Byte nop addl 60 subl 61 andl 62 halt rrmovl rA, rB rmmovl jmp 7 le jxx Dest Dest call Dest Dest jne7 ret 19e pushl rA popl rA CS APP

PC SEQ Stages Write back Fetch Read instruction from instruction Memory memory Decode Read program registers Execute Execute Compute value or address Memory Read or write data Decode Write Back Write program registers PC Fetch Update program counter