Question

I need help with questions 1-6 please. Thank you

1. Explain the CMOS process flow using a schematic diagram with due explanations to the following aspects 10 Points (a) Well and Channel formation (b) Isolation (c) Gate Oxide Formation (d) Gate and Source/Drain Formations (e) Contacts and Metallization 2. Consider a chip that has dimensions of 5000 um x 4000 um. 4 Points (a) Estimate the fabrication yield 'Y' assuming a defect density of D=0.5 cm? (b) What would be the projected yield be if the design were shrunk to a size of 3900 um x 2900 um. 3. A square chip has side lengths of 6000 um X 6000 um. 4 Points (a) Estimate the fabrication yield 'Y' assuming a defect density of D=0.6 cm? (b) What would be the percentage increase in estimated yield if it were possible to create a better silicon wafer with D=0.5 cm? 4. A CMOS inverter circuit is characterized by Ra=44092; Rp =44092; Vpp = 5V. The output capacitance is measured to be Cout= 167 fF. (a) Calculate tu (b) Calculate the 4 Points 5. An nFET is made with an aspect ratio of (W/L) = 1, which yields a maximum current of In =0.5mA. Find the aspect ratio that increases the maximum current to l. = 4.7mA. Then calculate R. and C, for both transistor sizes, using ra = 160002 and cn = 2.1fF and then find the product R.C. for the device. 6 Points 6. A CMOS process creates nFETS that have parasitic parameters ra = 1800.. and cn = 1.7fF. Find Rn and for transistors with the rottowing gate dimensions. All values are in units of microns. (a) W = 8 and L= 1 (b) W = 4 and L=1 4 Points

Answer 1

page-1 solution: Lurrays on a substrate (generally Photo desist ZTTITTLILA O oxide lIllllll P-type), a layer of impurities sio z is formed by exposing the substrate substrate to high ammounts of oxygen and hydrogen then this L is covered with a photo resistor, to protect from urrays the excess of photoresistor is removed on the area where impurities are wanted (where the N-well will be generated) louide - Nwell Unlike Nmos, pmos need an Nu well and this process isolates 1p-substrate de devices bulk from the P-substrate by diffusing impurites on the substrate, and oxide, its no longer useful, since in the aligned onide will be generated removing the first next process, a more polysilcon A more precisely designed layer of gate onide oxide is generated being very careful I w-well] N-well with the width of this layes, on top of it, just like an internal a the IP-substrate function of this layer is to avoid the doo under the poly silicon ayer poly silicon and onde are removed from unwanted places right after being placed en is to avoid the dopping of the regions N=well d) The device is masked and this masked is removed in the regions Where diffusion of nt is wanted, this process is repeted for pt diffusion right after to create orains, sources and buiks e-substrate

Page - 2 40727 4 LPD potont 11 h tt rituel po substrate - N-wei P-substrate A lager of thick field onide coats the gaps where no connection is needed, then the whole device is covered generates gaps in aluminium which of that metal form de final connections, in this figure an Nhos device on the left and a pmos device on the right 2. Given chip dimensions 5000mm x 4000mm Area =(20x 100 x 10-12) = (20 x 106) m² - 20x 100x104 cm? and A = (2x 10-1)(m2 defect density y= the given yreld D=0.51cm² It AD

page-3 - 1+ (2x10-1) (m²(0.5) / (m? Y=0.400 the design chounk Shrunk to 3900 to 3900 mm x 2900 Hry A = 3400MM X 2900mm 1 = 1,131 Xio-s ma 1 = 001131 cm² Yield y = HAD D H (0.1131 (m2) (0.510m2) . y = (1+0.1131) (0.5) 0.946 با ما Given Da befect density D=0.6cm-2 Area = (6oooum & 6000mm) Аяеа е 36 Вт* 1 = 366106x (10" xcm2) Area = 0.36 (m2 we know yield ly= IAD

page-y Y- I I+(0.36X0.6) 1 +0.210 1.216 Y = 0.8223 1B Now Density =) D=0.5 cm-2 ya TAD it (0.36X0.5) Ert (036X0.5) ene [/2 = 0.8474 So, % increase in yield = (% 5,7%*100 1o 18 0.8474-0.8 223 008223 X 100 y increases -3.0527

page-5 In CMOS inverter t LH = propagation circuit belay from Low to high [th = (n (2). Rp. Cour the = propagation Delay from high - to-dow I the = ln (e). Rn. Cour a For for tuit = ln (2) Rp. cout Iff = 105, IPF = 100g = ln (2) * uno x 167410 thir = 50093 psec 1. b, the = ln (2) X Rnd Cour = ln (2) *440 A 1677 10ls [the = 500 43 psec Since Rn = Rp :so. Then the = 50.93 psec 5 Given data Wh =1 In = 0.5mA K= 10 Haluz In ak( W/k) vzo? vozno K1626x1

page-6 Up3 280 VDs a 7.000 For mam current Io = 407mA W/L = In - Kouros - 4.7 10x7.072 Wh = 9.402 For whe=1 cn=can wr o wna Cogide a gol we 3201 Ľ - Van Yw = 180r per unit Capacitence « 31 ea w/L=1 C =12 Yn = 1802 1 W/L =4.402 cn= con we - dol x 9.40222 W/L = 1907422 Rn - In Yw = 180 x 0.106 319.08 [i w/ = 9.40]

Page 7 6 a, Rn= on the = 1800 t = 2952 (n = wxL x Cn=8x1+ loafe (n = 13.6ff by Rn = Vnt a = 1800 | 4 Си - цях). 7te (n = 6.8ff
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as per HomeworkLib policy i have to write first question only but i written all six questions, by writing speed my handwritting is not good but you can understand it, i hope you understand it

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