Question

5.3 Rewrite the following program fragment that is written using the GPR instruction set for execution on a CISC processor that provides the same instruction set as the GPR processor but allows the register addressing mode to be used on the input operands or destination of any instruction. (Yes, the code fragment will execute correctly as written on such a processor. Your goal should be to reduce the number of instructions as much as possible. ) Assume that the program ends after the last instruction in the fragment, so that the only goal of the program should be to have the correct value written into memory at the end. LD r1, (r2) L013, (r4) LD r5, (r6) LD r7, (r8) DIV r9, r1, r3 ADD r10, r9, r5 SUB r11, r7, r10 ST (r12), r11

Answer 1

The following code is written by assuming the r2, r4, r6, r8 and r12 contents are decimal values as ADDR2_r2_content .....so on.

MOV BX, ADDR2_r2_content ; bx = r2 content

MOV AX,[BX] ; ax = (r2)

MOV CX, ADDR4_r4_content ; cx = r4 content

MOV BX, [CX] ; bx = (r4)

DIV BX ; ax = ax/bx  

; ax = (r2) / (r4)

MOV BX, ADDR6_r6_content ; bx = r6 content

ADD AX, [BX] ; ax = (r6) + bx = (r6) + { (r2) / (r4) }

MOV BX, ADDR8_r8_content ; bx = r8 content

MOV CX,[DX] ; cx = (r8)

SUB CX, AX ; cx = cx - ax = (r8) - { (r6) + { (r2) / (r4) } }

MOV BX, ADDR12_r12_content ; bx = r12 content

MOV [BX], CX ; (r12) = cx