Question

Refer to the following code from the 'ino' and answer the questions 72 73 1I Tinero A3 Setup: Capture each ACLK rising edge 74 TAOCCTL2 CM 1I CCIS 0 I CCIE I CAPI SCS 75 76 // Capture rising edge // Use CCI2A-ACLK, // Synchronous capture // Enable capture node, // Enable capture interrupt 78 79 80 // Use SMCLK as TAO clock source, ar TAOR // Start timer in continuous node 82 83 84 bis SR register(LPMO bits 5 86) GIE) Questions: 1. 2. 3. 4. 5. Line 74, TAOCCTL2 sets which CCR? Line 74, does the CCIE enable the interrupt for the CPU or just the CCR? Line 74 sets the Capture or Compare mode? Line 74 will create an interrupt when? Line 81 sets the CCR or the whole timer? Line 81 sets which Operating mode for the timer? Line 81 selects which clock input for the timer? 6. 7.

Answer 1

1) In Line 74, TIMER A, TACCRx for period, TACCR1 for one duty cycle, and TACCR2 for another duty cycle. So, TA0CCTL2 sets CCR2.

2) CCIE enables the interrupt reuest of the corresponding CCIFG, basically just for the CCR.  

3) Line 74 sets the Capture mode for acknowledge of rising edge.

4) Line 74 will use CCI2A as acknowledge then synchonize with capture value then it will create an interrupt to check whether interrupt mode will enable or not.

5) Line 81 sets the whole timer.

6) (Line 81) It will be using timer 0 so it will set for continuous mode for the timer.

7) Line 81 selects SMCLK as a input clock for the timer ;eg,SMCLK = 1MHZ so 1MHZ/1000 = 1Khz is the PWM Freq.