Question

Question #2. Design of a Sequential Circuit: A SEQUENCE DETECTOR that detects the sequence 10 must be designed whose present output z(k) is set to one when the past input u(k-1) is one and the present input u(k) is zero, where for the other three possible combinations of the input pair u(k-1), u(k) the present output z(k) is set to zero. The state diagram for a sequential circuit that detects the input sequence 10 discussed above is given below: AA x=0 x=1 a) Complete the state table shown below using the above state diagram. Present State x[k) Next State x(k+1) Output z(K) Input ulk) 0 1 0 0 1 1 1 b) Use the excitation table for a JK flip flop to complete the augmented state table, shown below, for the case where two JK flip flop used as memory. Next State x(k+1) Output z(K) Present State x[k) 0 0 Two Inputs of JK Flip Flop J K Input u(k) 0 1 0 1 1 1 Derive the output and D flip flop equations of the sequential circuit from the augmented state table. Draw the sequential circuit that implements the sequence detector of the sequence 10. d)

Answer 1

Output combining (a) and (6) Present State Input NextState a(k) uck) x (k+1) Two inputs to Jk Flipflop J Z(K) 0 x O 0 1 Х 1 1 Х | 0 0 is same as to D-flipflop (c) In o flipflop the input the next State' The D flip flop equation D= aut au u(atx) =ų ما Z: au The output equation is (d) The sequential circuit using o tup top и ti zbor Clock

If you have any questions comment down and please upvote thanks??