Question

1 / 2 Question #2. Design of a Sequential Circuit: A SEQUENCE DETECTOR that detects the sequence 11 must be designed whose present output z(k) is set to one when the past input (k-1) is one and the present input u(k) is also one, where for the other three possible combinations of the input pair u(k-1), uk) the present outputz(k) is set to zero. The state diagram for a sequential circuit that detects the input sequence 11 discussed above is given below: 05-) x=0 x=1 --- a) Complete the state table shown below using the above state diagram. xik) Present State Input Next State Output uik) x{k+1) z(K) 0 0 0 1 1 0 1 1 b) Use the excitation table for a T flip flop to complete the augmented state table, shown below, for the case where two JK Flip flop used as memory: Output Present State x(k) 0 0 Next State xk+1) Input of T Flip Flop T Input u(k) 0 1 0 1 1 1

answer a,b,c,d all of them one question

Answer 1

from the state diagram Input Present ack) Next (kH) output zck) ulk) 0. i I 0 l -

input from the state diagram Present Ingut x(k) ulk) Next 714) Output zck) O 0 F 0 --0 1 O - Oo O Офіч z(k) ulk) 20k) O z (k) = (k) uk) O o And gate To input of TFF ulk) O Y(k) T = alk) u'ck)+ a'ckbulk) 0 O T رن - alkuck + X(kjulk). Ta alt)ucky (d) Xor gale uck XOR T (kH) CLK PCLK TIP z(K)
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