Question

A. Starting with a 100KHz square-wave clock oscillating between 1 and 5 volts, how can one obtain a 25KHz clock using JK flip-flops? Draw the schematics of the circuit and explain its behaviour.

B. How would you obtain a 25 KHz triangular-wave clock? Draw the circuit and elaborate.

Answer 1

The circuit is the implementation of a two bit asynchronous up counter. The JK flip flops are in toggle mode. The output of the first flip flop is given as the clock of second flip flop. Both the flip flops are negative edge triggered. So at every falling edge the first flip flop will toggle state. The second flip flop will toggle only at every falling edge in the output of first flip flop. Thus the frequency of the output decreases by half for each bit i.e. for a 3 bit counter the output frequency of the third flip flop will be f/8.

Here a integrator has been used in cascade with the same circuit used in the question above. When we integrate square waveform we get a triangular waveform. Hence the output of the 2nd flip flop is given as input to the integrator as the required frequency is 25KHz. The values of R and C can be selected as per the requirements and availability.