Question

1. ( 3 pts. / 1 pt. each) Select the most appropriate communications hardware peripheral for each of the scenarios below. Mark “A”, “B” or “C” is each of the boxes below.

A. I2C

B. SPI
C. UART

ANSWER:

		Two microcontrollers communicating with each other without a shared clock signal.
		Microcontroller communicating synchronously with several low-end peripheral devices.
		Two microcontrollers communicating synchronously with other and several intelligent peripheral devices; when each microcontroller is master, it controls the clock signal.

2. ( 7 pts.) Write a C procedure “Watchdog_Init”, which will set the Watchdog Timer hardware to reset the microcontroller in in 65536 cycles (0.5 seconds) unless the Watchdog is fed. Make sure the Watchdog Interrupt is disabled.

(Hint: you will need to set all the appropriate bits to either 1 or 0; do NOT presume any bit in any of the registers you change to be previously set to any particular value)

(Hint: you may want to include calls in this code to “CriticalSection_Begin” and “CriticalSection_End defined above to disable and restore interrupts.)

ANSWER: