Question

Given the following state transition diagram, determine: XY a) The next state equation for X if the state machine is designed for minimum cost 0) The next state equation for X if the state machine is designed for minimum risk ) The next state equation for Y if the state machine is designed for minimum cost )The next state equation for Y if the state machine is designed for minimum risk

Answers are

1. X* = A’ • Y

2. X* = A’ • Y

3. Y* = A + Y

4. Y* = A•X’ + Y

How do I get these?

If using K-maps, please show all 3 variables used separately.

Answer 1

Answer:

State table: Determine the state table for the given state transition diagram as given below present state mput next state 0 0 0 0 0 0 0 0 0 0 Table-1 · If the present state of the X, Ý İs 01 and the input A is 0, the state remains unchanged. If the present state of the X. Y is 10 and the input A is 0, then the next state is 11. If the .If the present state of the X. Y is 10 and the input A is 0, the state remains unchanged. X and Y are states and A is the input in the state table and state diagram. If the input A is 1 for the same present state, then the next state is 10. input A is 1 for the same present state, the state remains unchanged. If the input A is 1 for the same present state, then the next state is 10. Minimum cost for X: It is an impotent specification while designing a circuit. The circuit must be design witha minimum number of gates to reduce the cost. Next state equation for X at minimum cost:

The number of gates can be minimized by using the K-maps or Boolean reduction techniques as given below: Consider Boolean equation for the next state X from the above state table: Boolean equation for X-XY1+ XYA + XYA + XYA+ XYA Reduce the above equation with K-Map as shown below: YA 00 01 11 10 The reduced Boolean espression r"-x+a Minimum cost is determined by number of gates and units(cost) used to implement the above expression. Consider a 2-input AND gate requires 2 units and 2-input OR gate requires 2 units then the minimum cost is calculated below 1AND gate and 1OR gate are required. b. Minimum risk for X: From the state diagram, the state 00 is unused. Consider a situation where the next state of XY becomes 00 for an input combination due to violations in the circuits. It is said to be a risk because of wrong prediction.

The risk can be minimized by resetting the circuit to its initial state when the state 00 occurs. The below state table is the minimum risk for X and Y Present state input next state 0 0 01 0 0 0 0 0 0 Table-2 The above state table shows that, when the present of XY is 00 and the input A is 0 and 1, make the next state as initial state which is 01. Therefore, the risk can be avoided. Next state equation for X at minimum risk: Consider the Boolean equation for X and reduce it as given below: The reduced Boolean expression is XX +YA

Next state equation for Y at minimum cost: Consider Boolean equation for the next state Y from the first state table: Boolean equation for Y -XYA+XY A+XYA Reduce the above equation with K-Map as shown below: YA 00 011 10 0 The reduced Boolean expression is y-XA + 4 The above equation requires 1 AND gate and 1 OR gate. Therefore, the minimum cost required to implement the design is 4

d. Next state equation for Y at minimum risk: Consider the second state table and determine the Boolean equation for the next state Y as given below: Reduce the above equation with K-Map as shown below: YA 00 01 11 10 The reduced Boolean expression is Y -XY +XA YA