Question

Table 1 Parameters for manual model of 0.13 micron CMOS process DSAT 0.416 0.39 0.297 254 0.14 NMOS PMOS -0.426 -0.29-0583 633 10261 Table 2 Capacitance parameters of NMOS and PMOS transistors in 0.13 micron CMOS process Cox Cov ma MOS 10.7 0.323 0.958 0.395 08 01 0288 0.8 P MOS-110.22ー10.298 11.02ー1042ー08 ー0.107ー0.1ーー0.8 (35 pt Q2 Inverter shown below is implemented in 0.13 um CMOS (8RF). The supply voltage is VDD-1.2 V. Both transistors have a channel length of 0.13 μm (LaLo) The total output load capacitance of this circuit; CL.- 0.2 pF, which is independent of transistor dimensions. a) Determine the transistor channel widths W, and W, to achieve a switching b) What is the propagation delay tpHi? c Determine the dynamic power dissipation due to charging and discharging of the d) Determine the peak value of the short circuit current (i.e. the current that flows threshold voltage, VM-0.TV and tpl и 0.2 ns. load capacitance Cu for the clock frequency of 2 GHz. from VoD to ground during switching when both nMOS and pMOS transistors are on simultaneously). Hint: This current is maximum when Vin-VM Voo Vout CL Vin

Answer 1

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