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3. Design a combinational circuit with inputs a, b, c, d and outputs w, z, y, z, where the input and output both represent a

7. Use the Boolean functions developed in problem #3 to create a circuit in verilog HDL with four inputs (ab cd) and four out

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3. Design a combinational circuit with inputs a, b, c, d and outputs w, z, y, z, where the input and output both represent a signed numbers (2s complement). The output is 7 less than the input, if the input is positive, or zero. If the input is negative, the output is 3 greater than the input.
7. Use the Boolean functions developed in problem #3 to create a circuit in verilog HDL with four inputs (ab cd) and four outputs (w,x,y,z) with each output equal to the result of problem #3. Show your HDL code as well as the simulation results.
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Ans ten tve, the a b c oo0 cd aro t acalacdtacdtac t o 图。 re 굿Hou Cocle modole Conb _ ckt ( ,d , w , x , 넉,2 ), a b, c na and (ne Na, h ae) no inst 2, d) end modole Comb-, c kdio 在 ILs C. Lu oslsran lor Cirei and Code

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