Homework Answers
7. Translate the following C code to MIPS assembly code. Use a minimum number of instructions....
7. Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a,b, i and j are in registers Ss0, Ss1, St0, and St1, respectively. Also, assume that register SS2 holds the base address of the array D. for(i-0; i<a; i++) for(j=0 ; j<b; j++)
IN MIPS AND MUST RUN IN QTSPIM Translate the following C code to MIPS assembly code....
IN MIPS AND MUST RUN IN QTSPIM
Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i and j are stored in registers Ss0, Ss1, St0 and Stl, respectively. Also assume that register Ss2 holds the base address of the array D. for (i=0; i<a; itt) for (i-0j<b:jt+)
Assignment 3 Translate the following MIPS code to C. Assume that the variables f, g, h,...
Assignment 3 Translate the following MIPS code to C. Assume that the variables f, g, h, i and j are assigned to registers Ss0, Ss1, Ss2, Ss3 and Ss4, respectively. Assume that the base address of the arrays A and B are in registers Ss6 and $s7, respectively. addi St0, Ss6, 4 add $t1, $s6, $0 #register $0 always holds 320s sw St1, 0(Sto) add Ss0, St1, Sto
Translate the following C code to MIPS assembly. Assume that the values of a, b, i,...
Translate the following C code to MIPS assembly. Assume that the values of a, b, i, and j are in registers $s0, $s1, $t0, and $t1, respectively. Also assume that $s2 holds the base address of the array D. for (i = 0: i < a: i++) for (j = 0: j < b: j++) D[2 * j] = i + j;
4. (3 pts. each) Write the hexadecimal representation of each MIPS assembly instruction: (4.1) sub $s3,...
4. (3 pts. each) Write the hexadecimal representation of each MIPS assembly instruction: (4.1) sub $s3, $t1, $s2 (4.2) bne $t3, $t4, 18 (4.3) sll $s0, $t5, 2 5. (20 pts.) Consider the following C (or java) code: else f=f+2; By storing the value of j in Ss0, write a sequence of MIPS assembly instructions that will execute these lines of code for the following two cases: (5.1) assuming that the values of f, g and h are stored in...
Translate the following code into MIPS code. Test (int i, int j) {  
Translate the following code into MIPS code. Test (int i, int j) { int k; k = Double(i+1) + Double (j-10) return k; } Sub (int m) { int g; g = m + m; return g; } Assume the compiler associates the variable k to the register $s0. Assume the compiler associates the variable g to the register $t0.
Translate each of the following pseudo-instructions into MIPS instructions. You should Produce a minimal sequence of...
Translate each of the following pseudo-instructions into MIPS instructions. You should Produce a minimal sequence of MIPS instructions to accomplish the required computation. (8 Points) 1) bgt $t1, 100, Label # bgt means branch if greater than 2) ble $s2, 10, Next # ble means branch if less than or equal 3) ror $s0, $s4, 7 # ror means rotate right $s4 by 7 bits and store the result in $s0 4) neg $s5, $s4 # $s5 will have the...
Please answer question 1-4 4. Vocabulary: Match definition to its word. There will be some words...
Please answer question 1-4
4. Vocabulary: Match definition to its word. There will be some words left over. (DUP some words left over. (50 points, 5 points each) part of the processor that performs actions such as mathematics, testing, and moving data the processor uses this computed memory location to access data used to combine multiple partial programs into a single executable how instructions are stored as machine code A. Indirect B. event handler c. pointer D. assembler E. control...
Convert the following C code to AVR assembly (you might want to reference the AVR Instruction...
Convert the following C code to AVR assembly (you might want to reference the AVR Instruction Set Data Sheet in Lab Resources on Moodle) If (i < 100X Assume we are working with unsigned integers and that i is in register R28, x in R22 and j in R23 O COMPARE: CP R28 100 BRCS END MOV R22 R23 INC R23 INC R28 JMP COMPARE END NOP O COMPARE: CPI R28 100 BRCC END MOV R22 R23 INC R23 INC...
Convert the following C code to AVR assembly (you might want to reference the AVR Instruction...
Convert the following C code to AVR assembly (you might want to reference the AVR Instruction Set Data Sheet in Lab Resources on Moodle) If (0 100X 州. Assume we are working with unsigned integers and that i is in register R28, x in R22 and j in R23 O COMPARE: CP R28 100 BRCS END MOV R22 R23 INC R23 INC R28 JMP COMPARE END NOP COMPARE: CPI R28 100 BRPL END MOV R22 R23 INC R23 INC R28...
7. Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a,b, i and j are in registers Ss0, Ss1, St0, and St1, respectively. Also, assume that register SS2 holds the base address of the array D. for(i-0; i<a; i++) for(j=0 ; j<b; j++)
IN MIPS AND MUST RUN IN QTSPIM
Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i and j are stored in registers Ss0, Ss1, St0 and Stl, respectively. Also assume that register Ss2 holds the base address of the array D. for (i=0; i<a; itt) for (i-0j<b:jt+)
Assignment 3 Translate the following MIPS code to C. Assume that the variables f, g, h, i and j are assigned to registers Ss0, Ss1, Ss2, Ss3 and Ss4, respectively. Assume that the base address of the arrays A and B are in registers Ss6 and $s7, respectively. addi St0, Ss6, 4 add $t1, $s6, $0 #register $0 always holds 320s sw St1, 0(Sto) add Ss0, St1, Sto
Translate the following C code to MIPS assembly. Assume that the values of a, b, i, and j are in registers $s0, $s1, $t0, and $t1, respectively. Also assume that $s2 holds the base address of the array D. for (i = 0: i < a: i++) for (j = 0: j < b: j++) D[2 * j] = i + j;
4. (3 pts. each) Write the hexadecimal representation of each MIPS assembly instruction: (4.1) sub $s3, $t1, $s2 (4.2) bne $t3, $t4, 18 (4.3) sll $s0, $t5, 2 5. (20 pts.) Consider the following C (or java) code: else f=f+2; By storing the value of j in Ss0, write a sequence of MIPS assembly instructions that will execute these lines of code for the following two cases: (5.1) assuming that the values of f, g and h are stored in...
Please answer question 1-4
4. Vocabulary: Match definition to its word. There will be some words left over. (DUP some words left over. (50 points, 5 points each) part of the processor that performs actions such as mathematics, testing, and moving data the processor uses this computed memory location to access data used to combine multiple partial programs into a single executable how instructions are stored as machine code A. Indirect B. event handler c. pointer D. assembler E. control...
Convert the following C code to AVR assembly (you might want to reference the AVR Instruction Set Data Sheet in Lab Resources on Moodle) If (i < 100X Assume we are working with unsigned integers and that i is in register R28, x in R22 and j in R23 O COMPARE: CP R28 100 BRCS END MOV R22 R23 INC R23 INC R28 JMP COMPARE END NOP O COMPARE: CPI R28 100 BRCC END MOV R22 R23 INC R23 INC...
Convert the following C code to AVR assembly (you might want to reference the AVR Instruction Set Data Sheet in Lab Resources on Moodle) If (0 100X 州. Assume we are working with unsigned integers and that i is in register R28, x in R22 and j in R23 O COMPARE: CP R28 100 BRCS END MOV R22 R23 INC R23 INC R28 JMP COMPARE END NOP COMPARE: CPI R28 100 BRPL END MOV R22 R23 INC R23 INC R28...
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