Question

Lag Compensator Design Using Root-Locus 2. Consider the unity feedback system in Figure 1 for G(s)- s(s+3(s6) Design a lag compensation to meet the following specifications The step response settling time is to be less than 5 sec. . The step response overshoot is to be less than 17% . The steady-state error to a unit ramp input must not exceed 10%. Dynamic specifications (overshoot and settling time) can be met using proportional feedback, but a lag compensator is needed to reduce steady-state error. Put the lag filter pole close to origin: use: p 0.01, and find determine the zero. Hint: Use the steady-state error requirement to establish a first relationship between the lag compensator gain K and zero z. Then, use the magnitude condition to obtain a second equation relating K and z. You have two equations to determine two unknowns: substitute the first equation into the second to find K and use the first equation again to find z. Y(s) R(S) Figure 1. Unity Feedback System

Answer 1

2 lo. -TA 1- 32 Donndmomt p akam. Pok-3Hc plot ' ℡.tnd kot

23.5 2.3 5 sts+ 3) 〈s+1) l-3) b뎐 Let s

О.IA (-3) o 3 3-33 9154 3-33 pe →乙 누나卢(. Sto . 3) ( 2.3