Question

Problem 1: BJT DC Circuits Analyze the four circuits below, first analytically and then verify using simulations in PSPICE/Multisim. You have to solve each circuit that is, find the status of the BUT (active, saturation or cutoff mode) and then find all the node voltages and all the currents. Whenever you solve manually always make the following assumptions: for npn BIT VE-0.7V (if the BE junction is forward biased) for pap BIT VEB-0.7V (if the BE junction is forward biased) * for npn and pnp assume that β-100 (only if the BJT įs in active mode) for npn BJT (if it is in saturation mode) VcE-O.IV 'for pap BJT (if it is in saturation mode) Vec 0.1V "for npn and pap BJT the borderline between active and saturation modes is Ve0 *for npn and pnp BJT in active mode α = 1 Whenever simulating in PSPICE use Q2N3904 for npn BJT and Q2N3906 for pap BUT The above assumptions are gross approximations (and work very well for all practical purposes) but: NBE equals 07V at one specific value of IE. In general these voltages vary slightly around 0.7V and can typically be anywhere between 0.65V and 0.75V The actual value of β for each BT is o en much larger than 100. Bactually varies slightly (as the reverse bias voltage Vcalvaries) · The parameter * .The actual value of the saturation mode Va for the above two transistors is actually close to 0.0SV and is not exactly constant Compare the hand-calculation results to the results obtainod by simulation. You may sometimes be amazed how close the computation results are to the true results despite the gross approximations .1 This example is relatively easy, as one of the BJT currents is given, a) Assume active mode and follow up with all the calculation justified, b) Change Re from 4K2 to 20k0-does the BJT mode change from active to saturation? Show the calculations. [Actually, part (b) is not so casy for manual solution and requires a solution technique like the one practiced in Example 3] proving that indeed the look

Answer 1

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