The problem may appear similar to others on the site, but this different problem with a different...
Problem 1: BJT DC Circuits Analyze the three circuits below, first analytically and then verify using PSPICE. You have to solve each circuit - that is, find the status of the BJT (active, saturation or cutoff mode) and then find all the node voltages and all the currents. Whenever you solve manually always make the following assumptions *for npn BJT Vse-0.7V (if the BE junction is forward biased), *for pnp BJT VeB-0.7V (if the BE junction is forward biased), * for npn and pnp assume that B-100 (only if the BJT is in active mode) *for npn BJT (if it is in saturation mode) VcE.sat-0.1V *for pnp BJT (if it is in saturation mode) VEc.sat-0.1V * for npn and pnp BJT the borderline between active and saturation modes is VcB0 *for npn and pnp BIT in active mode α ~ 1 Whenever simulating in PSPICE use Q2N3904 for npn BJT and Q2N3906 for pnp BJT The above assumptions are gross approximations: .VBEl equals 0.7V at one specific value of le. In general these voltages vary .The actual value of ß for each BJT is often much larger than 100. The parameter · The actual value of the saturation mode VCE for the above two transistors is slightly around 0.7V and can typically be anywhere between 0.65V and 0.75V B actually varies slightly (as the reverse bias voltage jVcB| varies) actually close to 0.05V and is not exactly constant Compare the hand-calculation results to the results obtained by simulation. You may sometimes be amazed how close the computation results are to the true results despite the gross approximations. 1.1 This example is relatively easy, as one of the BJT currents is given, a) Assume active mode and follow up with all the calculation showing that there is a contradiction and the BJT is actually in saturation mode, b) Assume saturation mode and solve the circuit, c) How would you change Rs so that the BJT is in active mode? IMA ok R k乳
Problem 1: BJT DC Circuits Analyze the three circuits below, first analytically and then verify using PSPICE. You have to solve each circuit - that is, find the status of the BJT (active, saturation or cutoff mode) and then find all the node voltages and all the currents. Whenever you solve manually always make the following assumptions *for npn BJT Vse-0.7V (if the BE junction is forward biased), *for pnp BJT VeB-0.7V (if the BE junction is forward biased), * for npn and pnp assume that B-100 (only if the BJT is in active mode) *for npn BJT (if it is in saturation mode) VcE.sat-0.1V *for pnp BJT (if it is in saturation mode) VEc.sat-0.1V * for npn and pnp BJT the borderline between active and saturation modes is VcB0 *for npn and pnp BIT in active mode α ~ 1 Whenever simulating in PSPICE use Q2N3904 for npn BJT and Q2N3906 for pnp BJT The above assumptions are gross approximations: .VBEl equals 0.7V at one specific value of le. In general these voltages vary .The actual value of ß for each BJT is often much larger than 100. The parameter · The actual value of the saturation mode VCE for the above two transistors is slightly around 0.7V and can typically be anywhere between 0.65V and 0.75V B actually varies slightly (as the reverse bias voltage jVcB| varies) actually close to 0.05V and is not exactly constant Compare the hand-calculation results to the results obtained by simulation. You may sometimes be amazed how close the computation results are to the true results despite the gross approximations. 1.1 This example is relatively easy, as one of the BJT currents is given, a) Assume active mode and follow up with all the calculation showing that there is a contradiction and the BJT is actually in saturation mode, b) Assume saturation mode and solve the circuit, c) How would you change Rs so that the BJT is in active mode? IMA ok R k乳