Computer Architecture Please help me explain the answer 3 For the following statement, translate the statement to ARM assembly code. Assume that variable fand g are each in register rO, r1. Base addr...

Question

Question

Computer Architecture

Please help me explain the answer

3 For the following statement, translate the statement to ARM assembly code. Assume that variable fand g are each in register

Answer 1

Answer #1

LDR r5,[r4, #12] means B[3] since one address correspond to 4 byte therefore 4*3 = 12

ADD r3,r3,r5,LSL #2; this means r3=r3+ r5<<2 shift and rotate by 2 results 3rd index

LDR r5, [r3,#0] -> r5 <- r3+0 // A[B[3]]

ADD r0,r1,r5 // f = g + A[B[3]], f = r0

// Please upvote (Thank you in advance).

Add a comment

Answer 2

Similar Homework Help Questions

ARM assembly language Write the final updated values for each memory and register after the given...

ARM assembly language Write the final updated values for each memory and register after the given instruction executes in the space provided.There are multiple parts of this problem. Note Only write the change values if the values didn't change. Leave the updated cell blank. please explain (as simple as possible ) whats going on after the given command is executed . Q.5.4 Bring to class LSL R6, R6, #3 Updated Data Updated Data Memory Address Ox84F0 Ox 841 Ox84F2 Ox843...
Could you please help me doing this? Slide #14: Slide #15 The question: ARM Assembly Language...

Could you please help me doing this? Slide #14: Slide #15 The question: ARM Assembly Language label mnemonic operand1, operand2, operand3 comments R2+R1->R3 Loc ADD R3, R2 R1 Label is a symbolic reference to this instruction's address in memory. Mnemonic represents the operation to be performed .The number of operands varies, depending on each specific instruction. Some instructions have no operands at all. operand1 is typically the destination register, and operand2 and operand3 are source operands. operand2 is usually a...