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Systems Programming problem:


Consider a processor with the following parameters Base CPI (no Memory Stall) Clock rate L1 miss rate L2 Direct Mapped speed

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Answer #1

Solution:

For main memory access time = 50ns
1) First level cache only
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*Main Memory access
= 1.5 + 0.07*50ns*2 GHz = 1.5 + 0.07*100 = 1.5 + 7 = 8.5
2) First level and Second level direct-mapped cache
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*L2 access + L2miss* Main memory access
= 1.5 + 0.07*12 + 0.035*50ns*2GHz = 1.5 + 0.84 + 3.5 = 5.84
3) First level and second level eight-way set associative
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*L2 access + L2miss* Main memory access
= 1.5 + 0.07*28 + 0.015*50ns*2GHz = 1.5 + 1.96 + 1.5 = 4.96
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For main memory access time = 100ns
1) First level cache only
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*Main Memory access
= 1.5 + 0.07*100ns*2 GHz = 1.5 + 0.07*200 = 1.5 + 14 = 15.5
2) First level and Second level direct-mapped cache
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*L2 access + L2miss* Main memory access
= 1.5 + 0.07*12 + 0.035*100ns*2GHz = 1.5 + 0.84 + 7 = 9.34
3) First level and second level eight-way set associative
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*L2 access + L2miss* Main memory access
= 1.5 + 0.07*28 + 0.015*100ns*2GHz = 1.5 + 1.96 + 3 = 6.46
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For main memory access time = 200ns
1) First level cache only
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*Main Memory access
= 1.5 + 0.07*200ns*2 GHz = 1.5 + 0.07*400 = 1.5 + 28 = 29.5
2) First level and Second level direct-mapped cache
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*L2 access + L2miss* Main memory access
= 1.5 + 0.07*12 + 0.035*200ns*2GHz = 1.5 + 0.84 + 14 = 16.34
3) First level and second level eight-way set associative
CPItotal= CPIbase+ CPImemory-stalls= CPIbase+ L1miss*L2 access + L2miss* Main memory access
= 1.5 + 0.07*28 + 0.015*200ns*2GHz = 1.5 + 1.96 + 6 = 9.46

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