Question

please answer all

spring 2019 Name 19. Gain Margin (dB) is: e1OdByb) 15dBa c) 20 d8; d) 35dB; e) 45d8 20. Phase margin (degree) is close to: a) 0; b) 45pe90) 135) e) 180 21. A MOSFET transistor gm 2m5, Cgs 2pF, Ced 0.5pF, its cut-off frequency, ft, is close to: a) 100 b) 300MHz ) 60OMH)1GHe) SGH 22. The cut-off frequency of a BIT with gm-40m5, r pi-2.5Kohm, r o-20Kohm, c mu 1pF and c pi is close to: a) a) 100MHz: 6) 300MH)c) 600MHE; d) 1GH)SGH 23. An amplifier has input impedance of 25Kohm and voltage gain of-9. To design the upper corner frequency of an amplifier is 1MHz, a capacitor is added between the input and output The valde this capacitor should be close to: a)0.6pF5) 4p) 60pF; d) 600pF; e) cannot be determined 24. Select configuration fora single-transistor amplifier with a gain of 30 dB and input resistance of Mohm. A) common-emitter; b) common-gate: c) common-source; djcommon-collectore implemented by single stage amplifier. 25. Select configuration for a single-transistor amplifier with a gain close to 0 d8 and input resistans S Mohm and load resistor of 5OKohmcommon-emitter; b) common-gate, c) common-source dcommon-collector; e) cannot be implemented by single stage amplifier. 26. Design an oscillator with an amplifier with gain of 12 and phase angle of 160 degree, the feedb network is composed by 4 identical phase shifter. The phase shift of each phase shifter in degr should be close to:40 b) 50; c)100; d)200; e) cannot be determined. tann The following questions are according to the following circuit: design a prototype OpAmp as the schematic shown in the figure below. Q1, Q5, Q11 and R provide bias to the OpAmp For NMOS, Kn' 300uA/, V0.6v, V 21 V/um, Design Vov-0.25V for all NMOS For PMOS, K'-90UAN, IVel-0.65v, V-27V/um, Design Vov-0.2V for all PMOS For BJT Q14, B-200,VA>100V VDD 5V and -VSS-5V MOSFET: gate length for Q8 and Q9 1.0 um, All other gate length 0.25um Design le 30pA through the bias circuit, IREF is the current through R The ratio between gate width of Q1, Q2, Q3, Q4 is W1:W2:w3:w4 1:6: 4:10 27. Identify the type of first stage amplifier: a) inverting amplifier; b) differential amplifier with passive loadc) differential amplifier with current mirror load d) emitter followere) none of above 28. Identify the type of second stage amplifier: a) inverting amplifier; b) differential amplifier with passive loady) differential amplifier with current mirro load d) emitter followere) none of above

Answer 1

Gain marn The roin masns deficed the Gecipro ca meignitude (encjw at the fsesvuenCM at ohich Phose -186- defined 9 the amount chonge i0 9pen- op &aan needed cLosed -Lo0p らtem n Stable System S Stahle then Showid be Posaive Ansunesa phase define c the hange in Open- p ehase needed Losed-S0P Been deffexence in betwecn the ne Freauensy 12 phase at Cxos Sove the the ives of 'ode Sy stemts Stabi the phase PeGve AnsweS P Given, am-2ns co AnSueS 2V ipr c PRPE 95 Ansues b

Av Nou IMH3 578D =626110 =63 69 Answes COLccto amp ex A Sod P 5MA 6o Ansues A ode A SohmR oh Coromon Ansve% Av= 12 Lentju: 166 NO of phaSehe Phase shife of eash phose hil Answer

NMOS Ay No vin O.69 VOvin= 025く PMOS Kp= 90MAI 1Ypl: 06ら Av6.30 0412 65 es OcoRs Answe C Diffesentin ap it coent onissc lood Answes