A sequential circuit is shown in Figure. The timing parameters for the gates and flip-flop...

A sequential circuit is shown in Figure. The timing parameters for the gates and flip-flops are as follows:

Inverter: rpd = 0.05 ns

XOR gate: tpd =0.20 ns

Flip-flop: fpd = 0.40 ns, ts = 0.1 ns, and th = 0.05 ns

(a) Find the longest path delay from an external circuit input passing through gates only to an external circuit output.

□ FIGURE Circuit for Problems and 6-11

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(b) Find the longest path delay in the circuit from an external input to positive clock edge.

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(c) Find the longest path delay from positive clock edge to output.

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(d) Find the longest path delay from positive clock edge to positive clock edge,

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(e) Determine the maximum frequency of operation of the circuit in megahertz (MFIz).