14.5 The logic threshold voltage Vth of a CMOS inverter from (5.87) is
where
(a). Assuming that μn = 2.5 μ p, Ln = Lp for simplicity, derive an expression for the percentage change in Vth in terms of percentage change in VT0,n,VT0,p and Wp/Wn.
(b). For nominal values of VT0,n = 0.8 V, VT0,p = -0.8 V and Wp = 2.5Wn, determine the maximum (worst-case) deviation of Vth for a ±0.1V change in both VT0,n and VT0,p, and a ±15% change in Wp/Wn.
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