(Remainder Function) Design a combinational circuit with three data inputs D2, D1, D0, two control inputs C1, C0, and two outputs R1, R0. The R1, R0 should be the remainder after dividing the unsigned binary number formed from D2, D1, D0, by the unsigned binary number formed by C1, C0. For example, D2, D1, D0 = 111, C1, C0 = 10, then R1, R0 = 01 (7 divided by 2 yields a remainder of 1). Note: Division by zero will never occur—take advantage of don’t-care conditions in this case.
(a) Write the truth table for R1 and R0.
(b) Fill in K-maps and write Boolean expressions for R1 and R0.
(c) Draw a schematic that implements the functions for R1 and R0 using a minimum number of NAND gates. Assume complemented literals are available and that there are no limits on NAND gate fan-ins.
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