Draw the logic diagram of a 4-bit register with mode selection inputs S1 andS0. The register is to be operated according to the function table below.
S1 | S0 | Register Operation |
0 | 0 | No change |
0 | 1 | Complement output |
1 | 0 | Load parallel data |
1 | 1 | Clear register to 0 |
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