Repeat Exercise assuming that you may use two ROMs, so that the delay for a 16-bit addition or subtraction is twice the delay through one ROM. Assume that the two ROMs must be identical in both size and programming. Try to minimize the total number of ROM bits required, and sketch the resulting adder/subtracter circuit. Can the number of ROM bits be further reduced if the two ROMs are allowed to be different?
Exercise
How many ROM bits would be required to build a 16-bit adder/subtracter with mode control, carry input, carry output, and two’s-complement overflow output? Be more specific than “billions and billions,” and explain your answer.
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