(Combinational Logic Design) In this chapter, we’ve examined a 2-bit binary adder circuit. Now consider a 2-bit binary subtractor, defined as follows. The inputs A, B and C, D form the two 2-bit numbers N1 and N2. The circuit will form the difference N1 − N2 on the output bits F (most significant) and G (least significant). Assume that the circuit never sees an input combination in which N1 is less than N2. The output bits are don’t cares in these cases.
(a) Fill in the 4-variable truth table for F and G.
(b) Fill in the K-map for the minimum sum-of-products expression for the functions F and G.
(c) Repeat to find the minimum product-of-sums expression for F and G.
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