(Counter Design) Design a 2-bit counter that behaves according to the two control inputs I0 and I1 as follows: I0, I1 = 0, 0: stop counting; I0, I1, = 0, 1: count up by one; I0, I1 = 1, 0: count down by one; I0, I1 = 1, 1: count by two.
(a) Draw the state diagram and state transition table.
(b) Implement the counter using D flip-flops.
(c) Assume that only 2-input NAND, NOR, XOR, and XNOR gates are available. Draw the schematic for your minimum gate count implementation.
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